The present invention relates to a semiconductor device manufacturing technique. Particularly, the present invention is concerned with a technique applicable effectively to the manufacture of a semiconductor device having a trench gate type power transistor.
It is breakdown voltage and ON resistance that are important characteristics required of a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor). When comparison is made on the basis of the same breakdown voltage, it can be said that the lower the ON resistance, the higher the performance. A loss generated during operation can be decreased by diminishing ON resistance.
As to ON resistance of a low breakdown voltage power MOSFET, a channel resistance developed in a semiconductor layer (silicon layer) is dominant and therefore scaling-down of a cell according to the MOSFET scaling rule is effective for decreasing ON resistance.
On the other hand, as to ON resistance of a high breakdown voltage power MOSFET, the resistance of a drift layer (drain layer) necessary for the attainment of a high breakdown voltage is dominant. Since the Super Junction structure (hereinafter referred to as the “SJ structure”) is a structure capable of making the drift layer low in resistance while ensuring a high breakdown voltage and therefore attracts attention of many concerns as a structure effective for decreasing the ON resistance of a high breakdown power MOSFET.
For attaining a low ON resistance there has been proposed a trench gate type wherein a trench is formed and a gate electrode is buried therein to reduce the unit cell area.
In U.S. Pat. No. 5,216,275 (Patent Literature 1) there is described a technique on a trench gate power MOSFET using the SJ structure.